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<title>Static Call Graph - [.\output\Project.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\output\Project.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Sat Jun 12 13:08:43 2021
<BR><P>
<H3>Maximum Stack Usage =       8276 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
EXTI10_15_IRQHandler &rArr; image_save &rArr; JPEG_TEST &rArr; RGB565ToRGB888
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[24]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[24]">ADC_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[24]">ADC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[c]">BusFault_Handler</a> from gd32f4xx_it.o(i.BusFault_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[28]">CAN0_EWMC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[26]">CAN0_RX0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[27]">CAN0_RX1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[25]">CAN0_TX_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[54]">CAN1_EWMC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[52]">CAN1_RX0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[53]">CAN1_RX1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[51]">CAN1_TX_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[60]">DCI_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1d]">DMA0_Channel0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1e]">DMA0_Channel1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1f]">DMA0_Channel2_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[20]">DMA0_Channel3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[21]">DMA0_Channel4_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[22]">DMA0_Channel5_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[23]">DMA0_Channel6_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[41]">DMA0_Channel7_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4a]">DMA1_Channel0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4b]">DMA1_Channel1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4c]">DMA1_Channel2_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4d]">DMA1_Channel3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4e]">DMA1_Channel4_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[56]">DMA1_Channel5_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[57]">DMA1_Channel6_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[58]">DMA1_Channel7_IRQHandler</a> from gd32f4xx_it.o(i.DMA1_Channel7_IRQHandler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[f]">DebugMon_Handler</a> from gd32f4xx_it.o(i.DebugMon_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[4f]">ENET_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[50]">ENET_WKUP_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[42]">EXMC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[18]">EXTI0_IRQHandler</a> from gd32f4xx_it.o(i.EXTI0_IRQHandler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3a]">EXTI10_15_IRQHandler</a> from gd32f4xx_it.o(i.EXTI10_15_IRQHandler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[19]">EXTI1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1a]">EXTI2_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1b]">EXTI3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[1c]">EXTI4_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[29]">EXTI5_9_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[16]">FMC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[62]">FPU_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[a]">HardFault_Handler</a> from gd32f4xx_it.o(i.HardFault_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[32]">I2C0_ER_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[31]">I2C0_EV_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[34]">I2C1_ER_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[33]">I2C1_EV_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5b]">I2C2_ER_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5a]">I2C2_EV_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[6a]">IPA_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[13]">LVD_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[b]">MemManage_Handler</a> from gd32f4xx_it.o(i.MemManage_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[9]">NMI_Handler</a> from gd32f4xx_it.o(i.NMI_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[10]">PendSV_Handler</a> from gd32f4xx_it.o(i.PendSV_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[17]">RCU_CTC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3b]">RTC_Alarm_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[15]">RTC_WKUP_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[8]">Reset_Handler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[43]">SDIO_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[35]">SPI0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[36]">SPI1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[45]">SPI2_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[65]">SPI3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[66]">SPI4_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[67]">SPI5_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[e]">SVC_Handler</a> from gd32f4xx_it.o(i.SVC_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[11]">SysTick_Handler</a> from gd32f4xx_it.o(i.SysTick_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[6b]">SystemInit</a> from system_gd32f4xx.o(i.SystemInit) referenced from startup_gd32f450.o(.text)
 <LI><a href="#[14]">TAMPER_STAMP_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2a]">TIMER0_BRK_TIMER8_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2d]">TIMER0_Channel_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2c]">TIMER0_TRG_CMT_TIMER10_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2b]">TIMER0_UP_TIMER9_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2e]">TIMER1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[2f]">TIMER2_IRQHandler</a> from bsp_timer.o(i.TIMER2_IRQHandler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[30]">TIMER3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[44]">TIMER4_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[48]">TIMER5_DAC_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[49]">TIMER6_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3d]">TIMER7_BRK_TIMER11_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[40]">TIMER7_Channel_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3f]">TIMER7_TRG_CMT_TIMER13_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3e]">TIMER7_UP_TIMER12_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[69]">TLI_ER_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[68]">TLI_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[61]">TRNG_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[46]">UART3_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[47]">UART4_IRQHandler</a> from bsp_uart.o(i.UART4_IRQHandler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[63]">UART6_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[64]">UART7_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[37]">USART0_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[38]">USART1_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[39]">USART2_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[59]">USART5_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[55]">USBFS_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[3c]">USBFS_WKUP_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5d]">USBHS_EP1_In_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5c]">USBHS_EP1_Out_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5f]">USBHS_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[5e]">USBHS_WKUP_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[d]">UsageFault_Handler</a> from gd32f4xx_it.o(i.UsageFault_Handler) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[12]">WWDGT_IRQHandler</a> from startup_gd32f450.o(.text) referenced from startup_gd32f450.o(RESET)
 <LI><a href="#[6d]">__main</a> from __main.o(!!!main) referenced from startup_gd32f450.o(.text)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[6d]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
<BR><BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[6e]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
</UL>

<P><STRONG><a name="[70]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
</UL>

<P><STRONG><a name="[125]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)

<P><STRONG><a name="[126]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)

<P><STRONG><a name="[71]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>
<BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>

<P><STRONG><a name="[127]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)

<P><STRONG><a name="[77]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li
</UL>

<P><STRONG><a name="[72]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000001))
<BR><BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_init
</UL>

<P><STRONG><a name="[128]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))

<P><STRONG><a name="[129]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C))

<P><STRONG><a name="[12a]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))

<P><STRONG><a name="[12b]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))

<P><STRONG><a name="[12c]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))

<P><STRONG><a name="[12d]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))

<P><STRONG><a name="[12e]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))

<P><STRONG><a name="[12f]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))

<P><STRONG><a name="[130]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A))

<P><STRONG><a name="[131]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011))

<P><STRONG><a name="[132]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))

<P><STRONG><a name="[133]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))

<P><STRONG><a name="[134]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))

<P><STRONG><a name="[135]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))

<P><STRONG><a name="[136]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))

<P><STRONG><a name="[137]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))

<P><STRONG><a name="[138]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033))

<P><STRONG><a name="[139]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))

<P><STRONG><a name="[13a]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))

<P><STRONG><a name="[13b]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))

<P><STRONG><a name="[7c]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[13c]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))

<P><STRONG><a name="[13d]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007))

<P><STRONG><a name="[13e]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F))

<P><STRONG><a name="[13f]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010))

<P><STRONG><a name="[140]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A))

<P><STRONG><a name="[141]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))

<P><STRONG><a name="[142]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))

<P><STRONG><a name="[6f]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2
</UL>

<P><STRONG><a name="[143]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))

<P><STRONG><a name="[74]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[76]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
<BR><BR>[Calls]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init
</UL>

<P><STRONG><a name="[144]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))

<P><STRONG><a name="[78]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
<BR><BR>[Stack]<UL><LI>Max Depth = 8276 + Unknown Stack Size
<LI>Call Chain = __rt_entry_main &rArr; main &rArr; image_save &rArr; JPEG_TEST &rArr; RGB565ToRGB888
</UL>
<BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>

<P><STRONG><a name="[145]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))

<P><STRONG><a name="[7f]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>

<P><STRONG><a name="[7b]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
<BR><BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
</UL>

<P><STRONG><a name="[146]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))

<P><STRONG><a name="[7d]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>

<P><STRONG><a name="[8]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>CAN0_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>CAN1_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[60]"></a>DCI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>DMA0_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>ENET_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>ENET_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[62]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[6a]"></a>IPA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>RCU_CTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[65]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[66]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[67]"></a>SPI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>TAMPER_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>TIMER0_BRK_TIMER8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>TIMER0_TRG_CMT_TIMER10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>TIMER0_UP_TIMER9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>TIMER5_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>TIMER7_BRK_TIMER11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>TIMER7_TRG_CMT_TIMER13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>TIMER7_UP_TIMER12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[69]"></a>TLI_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[68]"></a>TLI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[61]"></a>TRNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>UART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>UART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[64]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>USART0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>USART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>USBFS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>USBFS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5d]"></a>USBHS_EP1_In_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5c]"></a>USBHS_EP1_Out_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5f]"></a>USBHS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[5e]"></a>USBHS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[8c]"></a>__user_initial_stackheap</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, startup_gd32f450.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[7a]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = exit
</UL>
<BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_write_scanline
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_start_compress
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_calc_value
</UL>

<P><STRONG><a name="[80]"></a>__aeabi_assert</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, assert.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__assert_puts
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>
<BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>

<P><STRONG><a name="[147]"></a>__assert</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, assert.o(.text), UNUSED)

<P><STRONG><a name="[92]"></a>strstr</STRONG> (Thumb, 36 bytes, Stack size 12 bytes, strstr.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = strstr
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
</UL>

<P><STRONG><a name="[8f]"></a>__aeabi_memcpy</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_write_scanline
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
<LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_zigzag_sort
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_huff_table
</UL>

<P><STRONG><a name="[83]"></a>__rt_memcpy</STRONG> (Thumb, 138 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>

<P><STRONG><a name="[148]"></a>_memcpy_lastbytes</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_v6.o(.text), UNUSED)

<P><STRONG><a name="[84]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memcpy
</UL>

<P><STRONG><a name="[149]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[14a]"></a>__rt_memcpy_w</STRONG> (Thumb, 100 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[14b]"></a>_memcpy_lastbytes_aligned</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[e8]"></a>__aeabi_memclr</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memclr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_write_scanline
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_huff_table
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_calc_value
</UL>

<P><STRONG><a name="[85]"></a>__rt_memclr</STRONG> (Thumb, 68 bytes, Stack size 0 bytes, rt_memclr.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset_w
</UL>

<P><STRONG><a name="[14c]"></a>_memset</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr.o(.text), UNUSED)

<P><STRONG><a name="[ff]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_create_compress
</UL>

<P><STRONG><a name="[14d]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)

<P><STRONG><a name="[14e]"></a>__rt_memclr_w</STRONG> (Thumb, 78 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)

<P><STRONG><a name="[86]"></a>_memset_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memclr
</UL>

<P><STRONG><a name="[14f]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[6]"></a>__rt_heap_escrow</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[5]"></a>__rt_heap_expand</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[82]"></a>abort</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, abort.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 48 + Unknown Stack Size
<LI>Call Chain = abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
<LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
<LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>

<P><STRONG><a name="[81]"></a>__assert_puts</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, assert_puts.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __assert_puts &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>

<P><STRONG><a name="[88]"></a>_ttywrch</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sys_wrch.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__assert_puts
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>

<P><STRONG><a name="[7e]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[87]"></a>__rt_SIGABRT</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_abrt_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT_inner
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[150]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)

<P><STRONG><a name="[151]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)

<P><STRONG><a name="[152]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, indicate_semi.o(.text), UNUSED)

<P><STRONG><a name="[75]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap
<LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace
</UL>
<BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh
</UL>

<P><STRONG><a name="[8a]"></a>__sig_exit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, defsig_exit.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
</UL>

<P><STRONG><a name="[89]"></a>__rt_SIGABRT_inner</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_abrt_inner.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
</UL>

<P><STRONG><a name="[153]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)

<P><STRONG><a name="[8b]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[154]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)

<P><STRONG><a name="[8d]"></a>__default_signal_display</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, defsig_general.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT_inner
</UL>

<P><STRONG><a name="[8e]"></a>AT_check</STRONG> (Thumb, 142 bytes, Stack size 24 bytes, l610.o(i.AT_check))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = AT_check &rArr; strstr
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_Buffer
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;L610_init
</UL>

<P><STRONG><a name="[c]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.BusFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[93]"></a>Clear_Buffer</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, l610.o(i.Clear_Buffer))
<BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;L610_init
</UL>

<P><STRONG><a name="[af]"></a>Clear_txbuffer</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, l610.o(i.Clear_txbuffer))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
</UL>

<P><STRONG><a name="[58]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 104 bytes, Stack size 16 bytes, gd32f4xx_it.o(i.DMA1_Channel7_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = DMA1_Channel7_IRQHandler &rArr; dma_interrupt_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_flag_get
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_flag_clear
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, gd32f4xx_it.o(i.EXTI0_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = EXTI0_IRQHandler &rArr; dci_ov2640_init &rArr; sccb_config &rArr; i2c_clock_config &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_disable
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_interrupt_flag_get
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_reload_config
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_enable
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_enable
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_interrupt_flag_clear
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_enable
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_capture_enable
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, gd32f4xx_it.o(i.EXTI10_15_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8276 + Unknown Stack Size
<LI>Call Chain = EXTI10_15_IRQHandler &rArr; image_save &rArr; JPEG_TEST &rArr; RGB565ToRGB888
</UL>
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_interrupt_flag_get
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_interrupt_flag_clear
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_display
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.HardFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[a5]"></a>JPEG_TEST</STRONG> (Thumb, 150 bytes, Stack size 32 bytes, ejpeg.o(i.JPEG_TEST))
<BR><BR>[Stack]<UL><LI>Max Depth = 8252 + Unknown Stack Size
<LI>Call Chain = JPEG_TEST &rArr; RGB565ToRGB888
</UL>
<BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_write_scanline
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_start_compress
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_set_default
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_destory_compress
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_create_compress
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RGB565ToRGB888
</UL>
<BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[ad]"></a>L610_init</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, l610.o(i.L610_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = L610_init &rArr; AT_check &rArr; strstr
</UL>
<BR>[Calls]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_Buffer
<LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ae]"></a>MIPODM</STRONG> (Thumb, 186 bytes, Stack size 88 bytes, l610.o(i.MIPODM))
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = MIPODM &rArr; strstr
</UL>
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_txbuffer
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Clear_Buffer
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strstr
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.MemManage_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.NMI_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[a9]"></a>RGB565ToRGB888</STRONG> (Thumb, 134 bytes, Stack size 8220 bytes, main.o(i.RGB565ToRGB888))
<BR><BR>[Stack]<UL><LI>Max Depth = 8220<LI>Call Chain = RGB565ToRGB888
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[e]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, gd32f4xx_it.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
</UL>
<BR>[Calls]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_decrement
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[6b]"></a>SystemInit</STRONG> (Thumb, 116 bytes, Stack size 8 bytes, system_gd32f4xx.o(i.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
</UL>
<BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(.text)
</UL>
<P><STRONG><a name="[2f]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, bsp_timer.o(i.TIMER2_IRQHandler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>UART4_IRQHandler</STRONG> (Thumb, 148 bytes, Stack size 8 bytes, bsp_uart.o(i.UART4_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART4_IRQHandler &rArr; usart_interrupt_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_get
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_disable
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f4xx_it.o(i.UsageFault_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f450.o(RESET)
</UL>
<P><STRONG><a name="[e3]"></a>bit_num</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, jchuff.o(i.bit_num))
<BR><BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_encode_one_block
</UL>

<P><STRONG><a name="[b7]"></a>ckout0_init</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, dci_ov2640.o(i.ckout0_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = ckout0_init &rArr; gpio_output_options_set
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_ckout0_config
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
</UL>

<P><STRONG><a name="[bc]"></a>dci_byte_read</STRONG> (Thumb, 400 bytes, Stack size 16 bytes, sccb.o(i.dci_byte_read))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = dci_byte_read &rArr; i2c_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_stop_on_bus
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_start_on_bus
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_master_addressing
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_flag_get
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_flag_clear
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_data_transmit
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_data_receive
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_ack_config
</UL>
<BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_id_read
</UL>

<P><STRONG><a name="[c5]"></a>dci_byte_write</STRONG> (Thumb, 240 bytes, Stack size 16 bytes, sccb.o(i.dci_byte_write))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = dci_byte_write &rArr; i2c_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_stop_on_bus
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_start_on_bus
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_master_addressing
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_flag_get
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_flag_clear
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_data_transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_id_read
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ov2640_outsize_set
</UL>

<P><STRONG><a name="[e1]"></a>dci_capture_disable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_dci.o(i.dci_capture_disable))
<BR><BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[9e]"></a>dci_capture_enable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_dci.o(i.dci_capture_enable))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[c6]"></a>dci_config</STRONG> (Thumb, 568 bytes, Stack size 64 bytes, dci_ov2640.o(i.dci_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = dci_config &rArr; gpio_output_options_set
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_single_data_mode_init
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_deinit
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_subperipheral_select
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_init
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
</UL>

<P><STRONG><a name="[9d]"></a>dci_enable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_dci.o(i.dci_enable))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c8]"></a>dci_init</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, gd32f4xx_dci.o(i.dci_init))
<BR><BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
</UL>

<P><STRONG><a name="[cc]"></a>dci_ov2640_id_read</STRONG> (Thumb, 96 bytes, Stack size 16 bytes, dci_ov2640.o(i.dci_ov2640_id_read))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = dci_ov2640_id_read &rArr; dci_byte_write &rArr; i2c_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9b]"></a>dci_ov2640_init</STRONG> (Thumb, 152 bytes, Stack size 8 bytes, dci_ov2640.o(i.dci_ov2640_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 140<LI>Call Chain = dci_ov2640_init &rArr; sccb_config &rArr; i2c_clock_config &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ov2640_outsize_set
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ckout0_init
</UL>
<BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[91]"></a>delay_1ms</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, systick.o(i.delay_1ms))
<BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI10_15_IRQHandler
<LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;L610_init
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[b0]"></a>delay_decrement</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, systick.o(i.delay_decrement))
<BR><BR>[Called By]<UL><LI><a href="#[11]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[95]"></a>dma_channel_disable</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, gd32f4xx_dma.o(i.dma_channel_disable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_channel_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel7_IRQHandler
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[97]"></a>dma_channel_enable</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, gd32f4xx_dma.o(i.dma_channel_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_channel_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel7_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[cb]"></a>dma_channel_subperipheral_select</STRONG> (Thumb, 38 bytes, Stack size 12 bytes, gd32f4xx_dma.o(i.dma_channel_subperipheral_select))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = dma_channel_subperipheral_select
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
</UL>

<P><STRONG><a name="[c9]"></a>dma_deinit</STRONG> (Thumb, 164 bytes, Stack size 8 bytes, gd32f4xx_dma.o(i.dma_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_deinit
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
</UL>

<P><STRONG><a name="[e0]"></a>dma_interrupt_disable</STRONG> (Thumb, 62 bytes, Stack size 12 bytes, gd32f4xx_dma.o(i.dma_interrupt_disable))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = dma_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[9c]"></a>dma_interrupt_enable</STRONG> (Thumb, 62 bytes, Stack size 12 bytes, gd32f4xx_dma.o(i.dma_interrupt_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = dma_interrupt_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[96]"></a>dma_interrupt_flag_clear</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, gd32f4xx_dma.o(i.dma_interrupt_flag_clear))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = dma_interrupt_flag_clear
</UL>
<BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel7_IRQHandler
</UL>

<P><STRONG><a name="[94]"></a>dma_interrupt_flag_get</STRONG> (Thumb, 516 bytes, Stack size 20 bytes, gd32f4xx_dma.o(i.dma_interrupt_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = dma_interrupt_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel7_IRQHandler
</UL>

<P><STRONG><a name="[ca]"></a>dma_single_data_mode_init</STRONG> (Thumb, 340 bytes, Stack size 16 bytes, gd32f4xx_dma.o(i.dma_single_data_mode_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = dma_single_data_mode_init
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
</UL>

<P><STRONG><a name="[f0]"></a>dsp_fdct_8x8</STRONG> (Thumb, 1636 bytes, Stack size 240 bytes, dct.o(i.dsp_fdct_8x8))
<BR><BR>[Stack]<UL><LI>Max Depth = 240<LI>Call Chain = dsp_fdct_8x8
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
</UL>

<P><STRONG><a name="[d1]"></a>exmc_flag_get</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, gd32f4xx_exmc.o(i.exmc_flag_get))
<BR><BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
</UL>

<P><STRONG><a name="[d2]"></a>exmc_sdram_command_config</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, gd32f4xx_exmc.o(i.exmc_sdram_command_config))
<BR><BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
</UL>

<P><STRONG><a name="[d0]"></a>exmc_sdram_init</STRONG> (Thumb, 272 bytes, Stack size 16 bytes, gd32f4xx_exmc.o(i.exmc_sdram_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = exmc_sdram_init
</UL>
<BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
</UL>

<P><STRONG><a name="[d3]"></a>exmc_sdram_refresh_count_set</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, gd32f4xx_exmc.o(i.exmc_sdram_refresh_count_set))
<BR><BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
</UL>

<P><STRONG><a name="[cf]"></a>exmc_synchronous_dynamic_ram_init</STRONG> (Thumb, 592 bytes, Stack size 112 bytes, exmc_sdram.o(i.exmc_synchronous_dynamic_ram_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = exmc_synchronous_dynamic_ram_init &rArr; gpio_output_options_set
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_sdram_refresh_count_set
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_sdram_init
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_sdram_command_config
<LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[102]"></a>exti_init</STRONG> (Thumb, 184 bytes, Stack size 8 bytes, gd32f4xx_exti.o(i.exti_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = exti_init
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
</UL>

<P><STRONG><a name="[a2]"></a>exti_interrupt_flag_clear</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, gd32f4xx_exti.o(i.exti_interrupt_flag_clear))
<BR><BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI10_15_IRQHandler
<LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
</UL>

<P><STRONG><a name="[98]"></a>exti_interrupt_flag_get</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_exti.o(i.exti_interrupt_flag_get))
<BR><BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI10_15_IRQHandler
<LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
</UL>

<P><STRONG><a name="[d4]"></a>gd_eval_com_init</STRONG> (Thumb, 164 bytes, Stack size 16 bytes, gd32f450i_eval.o(i.gd_eval_com_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = gd_eval_com_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c7]"></a>gpio_af_set</STRONG> (Thumb, 94 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_af_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_af_set
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
</UL>

<P><STRONG><a name="[10b]"></a>gpio_bit_set</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f4xx_gpio.o(i.gpio_bit_set))
<BR><BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
</UL>

<P><STRONG><a name="[b9]"></a>gpio_mode_set</STRONG> (Thumb, 78 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_mode_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_mode_set
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ckout0_init
</UL>

<P><STRONG><a name="[ba]"></a>gpio_output_options_set</STRONG> (Thumb, 66 bytes, Stack size 20 bytes, gd32f4xx_gpio.o(i.gpio_output_options_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_output_options_set
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ckout0_init
</UL>

<P><STRONG><a name="[c3]"></a>i2c_ack_config</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_ack_config))
<BR><BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[da]"></a>i2c_clock_config</STRONG> (Thumb, 204 bytes, Stack size 40 bytes, gd32f4xx_i2c.o(i.i2c_clock_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = i2c_clock_config &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
</UL>

<P><STRONG><a name="[c4]"></a>i2c_data_receive</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_data_receive))
<BR><BR>[Called By]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[c1]"></a>i2c_data_transmit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_data_transmit))
<BR><BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[dc]"></a>i2c_deinit</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, gd32f4xx_i2c.o(i.i2c_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = i2c_deinit
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
</UL>

<P><STRONG><a name="[114]"></a>i2c_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_enable))
<BR><BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
</UL>

<P><STRONG><a name="[c0]"></a>i2c_flag_clear</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, gd32f4xx_i2c.o(i.i2c_flag_clear))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = i2c_flag_clear
</UL>
<BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[be]"></a>i2c_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f4xx_i2c.o(i.i2c_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = i2c_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[bf]"></a>i2c_master_addressing</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_master_addressing))
<BR><BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[113]"></a>i2c_mode_addr_config</STRONG> (Thumb, 28 bytes, Stack size 12 bytes, gd32f4xx_i2c.o(i.i2c_mode_addr_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = i2c_mode_addr_config
</UL>
<BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
</UL>

<P><STRONG><a name="[bd]"></a>i2c_start_on_bus</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_start_on_bus))
<BR><BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[c2]"></a>i2c_stop_on_bus</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_i2c.o(i.i2c_stop_on_bus))
<BR><BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_read
</UL>

<P><STRONG><a name="[a4]"></a>image_display</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, main.o(i.image_display))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = image_display
</UL>
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_reload_config
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_init
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_enable
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI10_15_IRQHandler
</UL>

<P><STRONG><a name="[a3]"></a>image_save</STRONG> (Thumb, 198 bytes, Stack size 16 bytes, main.o(i.image_save))
<BR><BR>[Stack]<UL><LI>Max Depth = 8268 + Unknown Stack Size
<LI>Call Chain = image_save &rArr; JPEG_TEST &rArr; RGB565ToRGB888
</UL>
<BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_disable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_disable
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_capture_enable
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_capture_disable
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI10_15_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[e2]"></a>jhuff_encode_one_block</STRONG> (Thumb, 200 bytes, Stack size 56 bytes, jchuff.o(i.jhuff_encode_one_block))
<BR><BR>[Stack]<UL><LI>Max Depth = 160 + Unknown Stack Size
<LI>Call Chain = jhuff_encode_one_block &rArr; jhuff_write_bits &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_write_bits
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;bit_num
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
</UL>

<P><STRONG><a name="[e5]"></a>jhuff_flush_buffer</STRONG> (Thumb, 118 bytes, Stack size 16 bytes, jchuff.o(i.jhuff_flush_buffer))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
<LI>Call Chain = jhuff_flush_buffer &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
</UL>

<P><STRONG><a name="[e4]"></a>jhuff_write_bits</STRONG> (Thumb, 124 bytes, Stack size 24 bytes, jchuff.o(i.jhuff_write_bits))
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = jhuff_write_bits &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_encode_one_block
</UL>

<P><STRONG><a name="[e7]"></a>jint_add_huff_table</STRONG> (Thumb, 160 bytes, Stack size 40 bytes, jcint.o(i.jint_add_huff_table))
<BR><BR>[Stack]<UL><LI>Max Depth = 60<LI>Call Chain = jint_add_huff_table &rArr; jint_calc_huff_tbl
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_calc_huff_tbl
</UL>
<BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_std_huff_tables
</UL>

<P><STRONG><a name="[ea]"></a>jint_add_quant_table</STRONG> (Thumb, 116 bytes, Stack size 48 bytes, jcint.o(i.jint_add_quant_table))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = jint_add_quant_table &rArr; jutl_zigzag_sort
</UL>
<BR>[Calls]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_zigzag_sort
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_std_quant_tables
</UL>

<P><STRONG><a name="[e9]"></a>jint_calc_huff_tbl</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, jcint.o(i.jint_calc_huff_tbl))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = jint_calc_huff_tbl
</UL>
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_huff_table
</UL>

<P><STRONG><a name="[ef]"></a>jint_process_mcu</STRONG> (Thumb, 350 bytes, Stack size 64 bytes, jcint.o(i.jint_process_mcu))
<BR><BR>[Stack]<UL><LI>Max Depth = 304 + Unknown Stack Size
<LI>Call Chain = jint_process_mcu &rArr; dsp_fdct_8x8
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dsp_fdct_8x8
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_zigzag_sort
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_encode_one_block
</UL>
<BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_rows
</UL>

<P><STRONG><a name="[f1]"></a>jint_process_rows</STRONG> (Thumb, 320 bytes, Stack size 48 bytes, jcint.o(i.jint_process_rows))
<BR><BR>[Stack]<UL><LI>Max Depth = 352 + Unknown Stack Size
<LI>Call Chain = jint_process_rows &rArr; jint_process_mcu &rArr; dsp_fdct_8x8
</UL>
<BR>[Calls]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_cc_rgb2ycc
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
</UL>
<BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_write_scanline
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
</UL>

<P><STRONG><a name="[f3]"></a>jint_std_huff_tables</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, jcint.o(i.jint_std_huff_tables))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = jint_std_huff_tables &rArr; jint_add_huff_table &rArr; jint_calc_huff_tbl
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_huff_table
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_set_default
</UL>

<P><STRONG><a name="[f4]"></a>jint_std_quant_tables</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, jcint.o(i.jint_std_quant_tables))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = jint_std_quant_tables &rArr; jint_add_quant_table &rArr; jutl_zigzag_sort
</UL>
<BR>[Calls]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_quant_table
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_set_default
</UL>

<P><STRONG><a name="[f5]"></a>jmkr_write_end</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, jcmarker.o(i.jmkr_write_end))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
<LI>Call Chain = jmkr_write_end &rArr; jmkr_write_image_end &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_image_end
</UL>
<BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_finish_compress
</UL>

<P><STRONG><a name="[f7]"></a>jmkr_write_frame_head</STRONG> (Thumb, 220 bytes, Stack size 48 bytes, jcmarker.o(i.jmkr_write_frame_head))
<BR><BR>[Stack]<UL><LI>Max Depth = 128 + Unknown Stack Size
<LI>Call Chain = jmkr_write_frame_head &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[f8]"></a>jmkr_write_huff_table</STRONG> (Thumb, 322 bytes, Stack size 24 bytes, jcmarker.o(i.jmkr_write_huff_table))
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = jmkr_write_huff_table &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[f6]"></a>jmkr_write_image_end</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, jcmarker.o(i.jmkr_write_image_end))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = jmkr_write_image_end &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_end
</UL>

<P><STRONG><a name="[f9]"></a>jmkr_write_image_start</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, jcmarker.o(i.jmkr_write_image_start))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = jmkr_write_image_start &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[fa]"></a>jmkr_write_jfif</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, jcmarker.o(i.jmkr_write_jfif))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
<LI>Call Chain = jmkr_write_jfif &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[fb]"></a>jmkr_write_quant_table</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, jcmarker.o(i.jmkr_write_quant_table))
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = jmkr_write_quant_table &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[fc]"></a>jmkr_write_scan_head</STRONG> (Thumb, 170 bytes, Stack size 48 bytes, jcmarker.o(i.jmkr_write_scan_head))
<BR><BR>[Stack]<UL><LI>Max Depth = 128 + Unknown Stack Size
<LI>Call Chain = jmkr_write_scan_head &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jutl_write_byte
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>

<P><STRONG><a name="[fd]"></a>jmkr_write_start</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, jcmarker.o(i.jmkr_write_start))
<BR><BR>[Stack]<UL><LI>Max Depth = 136 + Unknown Stack Size
<LI>Call Chain = jmkr_write_start &rArr; jmkr_write_scan_head &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_scan_head
<LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_quant_table
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_jfif
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_image_start
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_huff_table
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_frame_head
</UL>
<BR>[Called By]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_start_compress
</UL>

<P><STRONG><a name="[fe]"></a>jpeg_calc_value</STRONG> (Thumb, 280 bytes, Stack size 32 bytes, jcapi.o(i.jpeg_calc_value))
<BR><BR>[Stack]<UL><LI>Max Depth = 40 + Unknown Stack Size
<LI>Call Chain = jpeg_calc_value &rArr; exit
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_set_default
</UL>

<P><STRONG><a name="[a6]"></a>jpeg_create_compress</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, jcapi.o(i.jpeg_create_compress))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = jpeg_create_compress &rArr; __aeabi_memclr4
</UL>
<BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[ac]"></a>jpeg_destory_compress</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, jcapi.o(i.jpeg_destory_compress))
<BR><BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[ab]"></a>jpeg_finish_compress</STRONG> (Thumb, 132 bytes, Stack size 24 bytes, jcapi.o(i.jpeg_finish_compress))
<BR><BR>[Stack]<UL><LI>Max Depth = 376 + Unknown Stack Size
<LI>Call Chain = jpeg_finish_compress &rArr; jint_process_rows &rArr; jint_process_mcu &rArr; dsp_fdct_8x8
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_end
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_rows
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_flush_buffer
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[a7]"></a>jpeg_set_default</STRONG> (Thumb, 110 bytes, Stack size 8 bytes, jcapi.o(i.jpeg_set_default))
<BR><BR>[Stack]<UL><LI>Max Depth = 208 + Unknown Stack Size
<LI>Call Chain = jpeg_set_default &rArr; jint_std_quant_tables &rArr; jint_add_quant_table &rArr; jutl_zigzag_sort
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_std_quant_tables
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_std_huff_tables
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jpeg_calc_value
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[a8]"></a>jpeg_start_compress</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, jcapi.o(i.jpeg_start_compress))
<BR><BR>[Stack]<UL><LI>Max Depth = 152 + Unknown Stack Size
<LI>Call Chain = jpeg_start_compress &rArr; jmkr_write_start &rArr; jmkr_write_scan_head &rArr; jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_start
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[aa]"></a>jpeg_write_scanline</STRONG> (Thumb, 182 bytes, Stack size 32 bytes, jcapi.o(i.jpeg_write_scanline))
<BR><BR>[Stack]<UL><LI>Max Depth = 384 + Unknown Stack Size
<LI>Call Chain = jpeg_write_scanline &rArr; jint_process_rows &rArr; jint_process_mcu &rArr; dsp_fdct_8x8
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_rows
</UL>
<BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;JPEG_TEST
</UL>

<P><STRONG><a name="[f2]"></a>jutl_cc_rgb2ycc</STRONG> (Thumb, 200 bytes, Stack size 12 bytes, jutility.o(i.jutl_cc_rgb2ycc))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = jutl_cc_rgb2ycc
</UL>
<BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_rows
</UL>

<P><STRONG><a name="[e6]"></a>jutl_write_byte</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, jutility.o(i.jutl_write_byte))
<BR><BR>[Stack]<UL><LI>Max Depth = 80 + Unknown Stack Size
<LI>Call Chain = jutl_write_byte &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>
<BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_scan_head
<LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_quant_table
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_jfif
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_image_start
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_image_end
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_huff_table
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jmkr_write_frame_head
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_write_bits
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jhuff_flush_buffer
</UL>

<P><STRONG><a name="[ee]"></a>jutl_zigzag_sort</STRONG> (Thumb, 44 bytes, Stack size 144 bytes, jutility.o(i.jutl_zigzag_sort))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = jutl_zigzag_sort
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_quant_table
</UL>

<P><STRONG><a name="[100]"></a>key_config</STRONG> (Thumb, 172 bytes, Stack size 8 bytes, main.o(i.key_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = key_config &rArr; nvic_irq_enable
</UL>
<BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;syscfg_exti_line_config
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_interrupt_flag_clear
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exti_init
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[9f]"></a>lcd_config</STRONG> (Thumb, 204 bytes, Stack size 8 bytes, main.o(i.lcd_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = lcd_config &rArr; lcd_gpio_config &rArr; gpio_output_options_set
</UL>
<BR>[Calls]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_init
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_init
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_dither_config
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_tli_clock_div_config
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_pllsai_config
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_osci_stab_wait
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_osci_on
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
</UL>
<BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[79]"></a>main</STRONG> (Thumb, 172 bytes, Stack size 8 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 8276 + Unknown Stack Size
<LI>Call Chain = main &rArr; image_save &rArr; JPEG_TEST &rArr; RGB565ToRGB888
</UL>
<BR>[Calls]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_reload_config
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_layer_enable
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tli_enable
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_enable
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_config
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_interrupt_enable
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dma_channel_enable
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;delay_1ms
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_id_read
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_enable
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_capture_enable
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;L610_init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_configuration
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
</UL>

<P><STRONG><a name="[103]"></a>nvic_irq_enable</STRONG> (Thumb, 186 bytes, Stack size 24 bytes, gd32f4xx_misc.o(i.nvic_irq_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = nvic_irq_enable
</UL>
<BR>[Calls]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_configuration
</UL>

<P><STRONG><a name="[111]"></a>nvic_priority_group_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_misc.o(i.nvic_priority_group_set))
<BR><BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_configuration
</UL>

<P><STRONG><a name="[ce]"></a>ov2640_outsize_set</STRONG> (Thumb, 136 bytes, Stack size 24 bytes, dci_ov2640.o(i.ov2640_outsize_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = ov2640_outsize_set &rArr; dci_byte_write &rArr; i2c_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_byte_write
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
</UL>

<P><STRONG><a name="[bb]"></a>rcu_ckout0_config</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, gd32f4xx_rcu.o(i.rcu_ckout0_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rcu_ckout0_config
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ckout0_init
</UL>

<P><STRONG><a name="[db]"></a>rcu_clock_freq_get</STRONG> (Thumb, 264 bytes, Stack size 84 bytes, gd32f4xx_rcu.o(i.rcu_clock_freq_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_clock_config
</UL>

<P><STRONG><a name="[112]"></a>rcu_flag_get</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_flag_get))
<BR><BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_osci_stab_wait
</UL>

<P><STRONG><a name="[107]"></a>rcu_osci_on</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_osci_on))
<BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[108]"></a>rcu_osci_stab_wait</STRONG> (Thumb, 342 bytes, Stack size 20 bytes, gd32f4xx_rcu.o(i.rcu_osci_stab_wait))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = rcu_osci_stab_wait
</UL>
<BR>[Calls]<UL><LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[b8]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_clock_enable))
<BR><BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exmc_synchronous_dynamic_ram_init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_gpio_config
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sccb_config
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_config
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ckout0_init
</UL>

<P><STRONG><a name="[de]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_reset_disable))
<BR><BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_deinit
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_deinit
</UL>

<P><STRONG><a name="[dd]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_periph_reset_enable))
<BR><BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_deinit
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_deinit
</UL>

<P><STRONG><a name="[105]"></a>rcu_pllsai_config</STRONG> (Thumb, 68 bytes, Stack size 8 bytes, gd32f4xx_rcu.o(i.rcu_pllsai_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rcu_pllsai_config
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[106]"></a>rcu_tli_clock_div_config</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, gd32f4xx_rcu.o(i.rcu_tli_clock_div_config))
<BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[cd]"></a>sccb_config</STRONG> (Thumb, 130 bytes, Stack size 8 bytes, sccb.o(i.sccb_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = sccb_config &rArr; i2c_clock_config &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
<LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_mode_addr_config
<LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_enable
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_deinit
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_clock_config
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;i2c_ack_config
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dci_ov2640_init
</UL>

<P><STRONG><a name="[101]"></a>syscfg_exti_line_config</STRONG> (Thumb, 166 bytes, Stack size 16 bytes, gd32f4xx_syscfg.o(i.syscfg_exti_line_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = syscfg_exti_line_config
</UL>
<BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;key_config
</UL>

<P><STRONG><a name="[10c]"></a>systick_config</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, systick.o(i.systick_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = systick_config &rArr; NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[10e]"></a>timer2_config</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, bsp_timer.o(i.timer2_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = timer2_config &rArr; nvic_irq_enable
</UL>
<BR>[Calls]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_struct_para_init
<LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_interrupt_enable
<LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_init
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_disable
<LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_deinit
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[117]"></a>timer_deinit</STRONG> (Thumb, 374 bytes, Stack size 8 bytes, gd32f4xx_timer.o(i.timer_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = timer_deinit
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
</UL>

<P><STRONG><a name="[11a]"></a>timer_disable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_disable))
<BR><BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
</UL>

<P><STRONG><a name="[110]"></a>timer_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_enable))
<BR><BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[119]"></a>timer_init</STRONG> (Thumb, 122 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_init))
<BR><BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
</UL>

<P><STRONG><a name="[11b]"></a>timer_interrupt_enable</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_interrupt_enable))
<BR><BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
</UL>

<P><STRONG><a name="[118]"></a>timer_struct_para_init</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, gd32f4xx_timer.o(i.timer_struct_para_init))
<BR><BR>[Called By]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer2_config
</UL>

<P><STRONG><a name="[10a]"></a>tli_dither_config</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_dither_config))
<BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[a1]"></a>tli_enable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_enable))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_display
</UL>

<P><STRONG><a name="[109]"></a>tli_init</STRONG> (Thumb, 184 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_init))
<BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[99]"></a>tli_layer_disable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_layer_disable))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
</UL>

<P><STRONG><a name="[a0]"></a>tli_layer_enable</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_layer_enable))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_display
</UL>

<P><STRONG><a name="[df]"></a>tli_layer_init</STRONG> (Thumb, 152 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_layer_init))
<BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_display
</UL>

<P><STRONG><a name="[9a]"></a>tli_reload_config</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, gd32f4xx_tli.o(i.tli_reload_config))
<BR><BR>[Called By]<UL><LI><a href="#[18]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EXTI0_IRQHandler
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_display
</UL>

<P><STRONG><a name="[10f]"></a>uart4_init</STRONG> (Thumb, 170 bytes, Stack size 8 bytes, bsp_uart.o(i.uart4_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = uart4_init &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[d6]"></a>usart_baudrate_set</STRONG> (Thumb, 224 bytes, Stack size 32 bytes, gd32f4xx_usart.o(i.usart_baudrate_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[b4]"></a>usart_data_receive</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_data_receive))
<BR><BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[b6]"></a>usart_data_transmit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_data_transmit))
<BR><BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[d5]"></a>usart_deinit</STRONG> (Thumb, 210 bytes, Stack size 8 bytes, gd32f4xx_usart.o(i.usart_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_deinit
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[d9]"></a>usart_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_enable))
<BR><BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[b3]"></a>usart_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f4xx_usart.o(i.usart_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[b5]"></a>usart_interrupt_disable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f4xx_usart.o(i.usart_interrupt_disable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[90]"></a>usart_interrupt_enable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f4xx_usart.o(i.usart_interrupt_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;AT_check
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MIPODM
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;image_save
</UL>

<P><STRONG><a name="[b2]"></a>usart_interrupt_flag_get</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, gd32f4xx_usart.o(i.usart_interrupt_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = usart_interrupt_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[d7]"></a>usart_receive_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_receive_config))
<BR><BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[d8]"></a>usart_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f4xx_usart.o(i.usart_transmit_config))
<BR><BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart4_init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init
</UL>

<P><STRONG><a name="[ec]"></a>__aeabi_dadd</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, daddsub_clz.o(x$fpl$dadd))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_dadd
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_quant_table
</UL>

<P><STRONG><a name="[11c]"></a>_dadd</STRONG> (Thumb, 332 bytes, Stack size 16 bytes, daddsub_clz.o(x$fpl$dadd), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dretinf
<LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
<LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dsub1
</UL>

<P><STRONG><a name="[ed]"></a>__aeabi_d2iz</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, dfix.o(x$fpl$dfix))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __aeabi_d2iz
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_quant_table
</UL>

<P><STRONG><a name="[120]"></a>_dfix</STRONG> (Thumb, 94 bytes, Stack size 32 bytes, dfix.o(x$fpl$dfix), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
</UL>

<P><STRONG><a name="[11f]"></a>__fpl_dnaninf</STRONG> (Thumb, 156 bytes, Stack size 16 bytes, dnaninf.o(x$fpl$dnaninf), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dfix
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dsub
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dadd
</UL>

<P><STRONG><a name="[11e]"></a>__fpl_dretinf</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, dretinf.o(x$fpl$dretinf), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_f2d
<LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dadd
</UL>

<P><STRONG><a name="[155]"></a>__aeabi_dsub</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, daddsub_clz.o(x$fpl$dsub), UNUSED)

<P><STRONG><a name="[121]"></a>_dsub</STRONG> (Thumb, 464 bytes, Stack size 32 bytes, daddsub_clz.o(x$fpl$dsub), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dnaninf
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dadd1
</UL>

<P><STRONG><a name="[eb]"></a>__aeabi_f2d</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, f2d.o(x$fpl$f2d))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_f2d
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_process_mcu
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;jint_add_quant_table
</UL>

<P><STRONG><a name="[123]"></a>_f2d</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, f2d.o(x$fpl$f2d), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_fnaninf
<LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fpl_dretinf
</UL>

<P><STRONG><a name="[124]"></a>__fpl_fnaninf</STRONG> (Thumb, 140 bytes, Stack size 8 bytes, fnaninf.o(x$fpl$fnaninf), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_f2d
</UL>

<P><STRONG><a name="[73]"></a>_fp_init</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, fpinit.o(x$fpl$fpinit))
<BR><BR>[Called By]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_fp_1
</UL>

<P><STRONG><a name="[156]"></a>__fplib_config_fpu_vfp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)

<P><STRONG><a name="[157]"></a>__fplib_config_pureend_doubles</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[104]"></a>lcd_gpio_config</STRONG> (Thumb, 494 bytes, Stack size 8 bytes, main.o(i.lcd_gpio_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = lcd_gpio_config &rArr; gpio_output_options_set
</UL>
<BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_output_options_set
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_mode_set
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_af_set
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;lcd_config
</UL>

<P><STRONG><a name="[10d]"></a>nvic_configuration</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, main.o(i.nvic_configuration))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = nvic_configuration &rArr; nvic_irq_enable
</UL>
<BR>[Calls]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[116]"></a>NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, systick.o(i.NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;systick_config
</UL>

<P><STRONG><a name="[115]"></a>system_clock_200m_25m_hxtal</STRONG> (Thumb, 240 bytes, Stack size 0 bytes, system_gd32f4xx.o(i.system_clock_200m_25m_hxtal))
<BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>

<P><STRONG><a name="[b1]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f4xx.o(i.system_clock_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
</UL>
<BR>[Calls]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_200m_25m_hxtal
</UL>
<BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[122]"></a>_dadd1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, daddsub_clz.o(x$fpl$dadd), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dsub
</UL>

<P><STRONG><a name="[11d]"></a>_dsub1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, daddsub_clz.o(x$fpl$dsub), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_dadd
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
